A typical receiver chain of modern transceivers includes a low noise amplifier (LNA), a down-converter (MIXER) that receives in input the signal amplified by the LNA an oscillating signal generated by a Voltage Controlled Oscillator (VCO), a low-pass (or band-pass) filter and an analog-to-digital converter (ADC), as schematically shown in FIG. 1.
The receiver chain, although optimized to work with an extremely low signal, has to be able to deal with high level signals or with a useful signal corrupted by high level disturbances or interferers. For these reasons, a variable gain amplifier (VGA) is present in the receiver (RX) chain as a separate block or is embedded in the LNA, as shown in FIG. 2.
The VGA is generally driven by an automatic gain control (AGC) circuit, which probes the level of signals in one or more points of the RX chain, in order to provide a signal at the highest possible level in input to the ADC without overloading the stages upstream.
A known topology of a LNA is shown in FIGS. 3A and 3B and uses a cascode-buffer stage between a differential amplification stage M1a, M2a, the trans-conductance gain Gm of which is determined by a control voltage VB1, to increase reverse isolation, and the load RL. The gain of the shown LNA is controlled through the differential amplification stage M1a, M2a, and through the depicted voltage-based Gilbert cell (M1b, M2b, M3b, M4b), that acts as a variable gain stage without effects on the output bias voltage and output pole frequency.
The three control voltages VB1, VB2, VB3 are accurately generated for controlling this LNA in order to obtain a precisely determined gain value.
A control circuit to provide the control voltages VB1, VB2 and VB3 to the voltage based Gilbert cell are proposed in References 1-3 identified herein and is shown in FIG. 4. It comprises two replica circuits Ma, Ma′, Mb, Mb′ and a current mirror allowing to impose the same current in the two replica circuits. The transistors Mcon′, Ma′ and Mb′ connected in a diode configuration make the transistors Md and Md′ carry the desired currents k·I1 and k·I2, respectively. Unfortunately, the drain voltage of the transistors Md and Md′ are not accurate replicas of the corresponding voltages of the Gilbert-cell of the LNA of FIG. 3B, thus making difficult to control accurately the overall gain.